(1) Field of the Invention
The present invention relates to a flash memory and a method for controlling the operation of the flash memory. In particular, the present invention relates to a flash memory including a memory cell array composed of a plurality of user areas each of which stores data and a plurality of flag areas each of which indicates a state of each user area and the method for controlling the flash memory.
(2) Description of the Related Art
A flash memory is an electrically erasable (rewritable) nonvolatile memory and is installed in various electric appliances. Today, there have been proposed various new memories that are fast and low in power consumption, such as a FeRAM (Ferroelectric Random Access Memory), a MRAM (Magnetoresistive Random Access Memory), and an OUM (Ovonics Unified Memory). From a viewpoint of cost, however, the flash memory has the better of the other kinds of memories. In particular, for a portable phones with a digital camera or a digital camera itself, the flash memory substantially occupies all of the storage.
On the contrary to the foregoing merit, the flash memory involves the following demerit. Since the flash memory can not overwrite data on the previously written data, the repetition of writes and deletions of data results in leaving separated unnecessary areas in the flash memory. Hence, the flash memory is required to execute the process of erasing these unnecessary areas and collecting the areas being used into a set of sequential areas for increasing the amount of areas on which data are to be stored. This process will be called a garbage collection. (For example, refer to the paragraph numbers [0023] to [0027] and FIG. 1 of the Japanese Unexamined Patent Publication No. 2000-278730.)
FIG. 18 shows a flow of process to be executed when data is rewritten in the conventional flash memory.
The following process is executed under the control of the CPU (Central Processing Unit) installed outside of the flash memory.
When the process is started, at first, the CPU determines if the process is for writing data or for nullifying data (S100). If it is for writing, the CPU executes the process of writing data (S101), while if it is for nullifying, the CPU executes the process of nullifying data (S102). Then, the CPU updates the management data (S103) and then calculates an area usage ratio of the flash memory (S104). Then, the CPU determines if the garbage collection is necessary according to the calculated result of the area usage ratio (S105). If necessary, the CPU executes the garbage collection process (S106), while if not necessary, the CPU terminates the process without doing any process.
As noted above, however, after rewriting data in the flash memory, in some cases, the CPU executes the garbage collection process that needs a considerably long processing time. Hence, this garbage collection process disadvantageously makes the overall processing time of the device such as a portable phone considerably longer.
This disadvantage may be solved by executing the data rewriting process and the garbage collection process of the flash memory on their respective timings. For this purpose, it is necessary to obtain the proper timing on which the garbage collection process is executed.